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Philips Semiconductors
Preliminary specification
IS-54 IF receiver
SA638
DESCRIPTION
The SA638 is an IF receiver chip which serves the dual mode functionality required by the IS-54 standards for North American cellular telephones. It provides for both the analog FM (AMPS mode) and DQPSK (TDMA digital mode) IF receive functions in a monolithic BiCMOS Integrated Circuit housed in a compact SSOP-24 plastic package.
PIN CONFIGURATION
RFIN RF BYPASS XTAL OSC (EMITTER)
1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
MIXER OUT IF AMP DECOUPLING IF AMP IN IF AMP DECOUPLING IF AMP OUT GND LIMITER IN LIMITER DECOUPLING LIMITER DECOUPLING LIMITER OUT QUADRATURE IN SWITCH OUT
APPLICATIONS
XTAL OSC (BASE) VCC RSSI FEEDBACK
* *
FEATURES
RSSI OUT POWER DOWN CONTROL DATA OUT POSTAMP IN POSTAMP OUT SWITCH CONTROL
UPDATE for 638
SR00907
Figure 1. Pin Configuration
ORDERING INFORMATION
DESCRIPTION 24-Pin Plastic TSSOP (Thin Shrink Small Outline Package) TEMPERATURE RANGE -40 to +85C ORDER CODE SA638 DWG # SOT-355
BLOCK DIAGRAM
24 23 22 21 20 19 18 17 16 15 14 13
IF AMP MIXER
GND LIMITER
OSCILLATOR
FAST RSSI
QUAD
VCC E B RSSI
-+
PWR DWN
+-
+-
UPDATE for 638
DATA
1
2
3
4
5
6
7
8
9
10
11
12
SR00908
Figure 2. Block Diagram
1995 Feb 16
1
Philips Semiconductors
Preliminary specification
IS-54 IF receiver
SA638
PIN DESCRIPTIONS
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Mnemonic RFIN(+) RFIN(-) OSCB OSCE VCC1 RSSI/AGC PWRDWN OSCDEMOD ModeSW AUDIO/LPF DEMOD1 Q I VCC2 IQREF GND2 DEMOD2/Offsets IQ DEMOD GND1 IFAMPOUT VCCMID IFAMPIN IFAMPDC MIXOUT RF Input Plus: Differential RF Plus input to mixer. RF Input Minus: Differential RF Minus input to mixer. LO Oscillator Transistor Base: LO generator (Pins 3 and 4) with internal buffer to drive mixer differentially. Can also be driven externally. LO Oscillator Transistor Emitter: Pins 3 and 4 are used to form an oscillator with external components (tank, varactor, etc.). Supply Voltage 1: Voltage supply for mixer and main bias. RSSI Out and AGC Input: Dual use: RSSI output in AMPS mode (no internal opamp) and AGC input in QPSK mode if needed. If no AGC, input will auto AGC to pre-defined fixed level for IQ outputs, in which case this pin also serves as RSSI output. Power-Down: Chip power-down input (CMOS compatible). IF Oscillator Input (LO frequency x4): Oscillator input x4 for I/Q demodulation is needed for internally generating quad LOs by division. Mode Switch: Logic control signal to select between AMPS and QPSK modes of operation. Audio Out and LPF Corner Frequency Control: Dual Use: Audio output in the AMPS mode and LPF corner frequency control in QPSK mode. Demod Auxiliary Pin: Used to implement FM demodulation in AMPS mode. Baseband Q Ouptut: Quadrature baseband output referenced to IQREF. Baseband I Output: In-phase baseband output referenced to IQREF. Supply Voltage 2: Voltage supply for IF amp and demodulator. I/Q Reference Voltage: Reference voltage for baseband I/Q outputs. Ground 2: Ground common for IF amp and demodulator. Demod Auxiliary Pin and I/Q Offset Control: Dual Use: In AMPS mode serves for FM demodulator; in QPSK mode serves as I/Q offset control. Input to the Demodulator: IF input to demodulator from AGC IF amp output. Ground 1: Ground common for mixer and main bias. IF Amplifier Output: IF amplifier output. VCC Midpoint Bypass: The internally generated VCC midpoint bias needs to be externally bypassed with a suitable capacitor. Input to IF Amplifier: Input to IF Amplifier from mixer through external filter. Reference Input to IF Amp: External bypassing for low frequency feedback of IF amp to null DC offsets. Output from Mixer: IF output from mixer to external BPF and IF amp. Function
ABSOLUTE MAXIMUM RATINGS
SYMBOL VCC VIN TSTG TA Single supply voltage Voltage applied to any other pin Storage temperature range Operating ambient temperature range SA639 PARAMETER RATING UNITS V V
C C
NOTE: JA Thermal impedance (DH package) 117C/W
1995 Feb 16
2
Philips Semiconductors
Preliminary specification
IS-54 IF receiver
SA638
DC ELECTRICAL CHARACTERISTICS
VCC = +3V, TA = 25C; unless otherwise stated. LIMITS SYMBOL VCC ICC Mixer Conversion power gain Noise figure IIP3 Input IP3 Input P-1, input compression point Input impedance IF output impedance Input frequency range LO and 2xLO suppression at IF output IF frequency IF Amp, FM Demodulator, RSSI in FM Mode IF amp gain Input impedance Output impedance RSSI dynamic range RSSI linearity Audio output impedance Audio output level Audio SINAD for RF signal -50dBm Noise figure Output IP3 IF Amp, AGC, RSSI and IQ Demodulator, QPSK Mode Input impedance Gain Input IP3 RSSI dynamic range RSSI linearity LPF frequency control Channel matching: gain phase I/Q output level I/Q output reference level NOTE: 1. for a given tbd linearity; about IQ output reference level -2.5 40 1 5 250 tbd 10 tbd 90 +2.5 80 dB dB kHz dB deg. mVPEAK 1.5 95 k dB -1.5 300 110 35 11 tbd dB 90 1.5 150 90 +1.5 dB k dB dB mVRMS 1k series with 2.5pF 1.5 150 -30 2 k MHz dBc MHz Input matched externally to tbd, Output is doubly terminated filter, 1.5k impedance Single side band 15 8.5 -10 -20 dB dB dBm dBm PARAMETER Power supply voltage range DC current drain TEST CONDITIONS MIN 2.7 10 SA639 TYP MAX 5.5 V mA UNITS
1995 Feb 16
3
Philips Semiconductors
Preliminary specification
IS-54 IF receiver
SA638
CIRCUIT DESCRIPTION The Mixer
The mixer section converts signals up to 150MHz to a 2nd IF of up to 2MHz (typically around 455KHz) with a power gain of 15dB, input IP3 of -10dBm and NF of 8.5dB. This section is comnlon to both modes of operation. An on-chip oscillator is provided (for use with an external tank, varactor, and synthesizer). The LO section has a buffer to drive the mixer differentially. After external bandpass filtering, the signals enter the chip again into the IF amplifier section. One input of the IF amp is biased to Vccmid (which is Vcc/2 generated internally and by-passed externally) and AC-coupled to the input signal externally while the other IF amp input is fed back from the amplifier output and AC by-passed to ground externally. This minimizes low frequency offsets since the amp is DC-coupled with very high gain. (Note that, compared to our standard 6xx IF chips, we are freeing quite a few pins by using only 1 decoupling pin and by NOT splitting up the IF amp into 2 parts and going in and out for filtering in between. In the AMPS mode the amplifier acts as a classic limiter with a fairly constant output voltage for a very large input voltage range. The RSSI (Received Signal Strength Indicator) is a temperature compensated high impedance output signal which acts as a voltage proportional to Logarithm of the input power and has a 90dB dynamic range. In the Digital mode the IF amp acts as a linear AGC (Automatic Gain Controlled) amplifier with maximum gain of 95dB and an AGC range of 85dB. The control for the AGC can be derived internally or supplied externally. If not supplied externally the internal AGC detector will regulate the gain to set the IQ baseband outputs to a pre-determined level (e.g., 250mVPEAK). The RSSI output which is high impedance will then be available at Pin 6 after external filtering. On the other hand an external AGC input can force the voltage at this pin to regulate the gain externally based on external measurement of say the IQ baseband output voltages. In such a case the RSSI function is NOT provided by this pin. (This has been done mainly to conserve pins. Depending on customer feedback we can provide for separate RSSI output and AGC input pins if necessary.)
externally as a x4 of the required correct LO signal such that the internal divider can generate quadrature LO signals of the correct frequency. After conversion to baseband the signals are filtered for suppressing LO and its by-products. (We have to decide if this filter will also provide for accurate baseband filtering. For example TI's ARCTIC baseband processor chip provides for such filtering in which case we do not have to provide for it.) After buffering, the single ended baseband IQ outputs are available for processing externally. The signals are referenced to a fixed DC level generated internally and available througn Pin 15. We can save a pin if the Vccmid (Pin 21) can be used for this purpose. Single-ended outputs as described above are used rather than differential outputs in order to save pins.
The FM Demodulator section
The FM Demodulator section will incorporate a new technique wnich will not require a quad tank. However, a backup technique of the quad discriminator will be available if the new riskier approach fails. Because of this, two pins have been allocated for the FM demodulator in addition to the audio output (similar to our existing FM-IF products). In this pinout there is provision for 2 VCC pins and 2 ground pins in addition to a VCC/2 bypass pin. This seems necessary in light of the hign gain values involved in the IF amp block. There are at least three pins which have dual functionality: RSSI/AGC; Audio/LPF; Demod2/ IQ Offsets. We have to carefully look at this to see if this is feasible. If not, the pinout has to be changed appropriately.
Fallback Positions:
1. We have a fallback for the FM demodulator, the classic FM discriminator. 2. If the "one IF amp will work for both modes'' approach fails, we can provide 2 separate IF amp paths and switch between them for the different modes. The penalty is increased chip area. 3. The proposed solution for the lF amp is to have all its gain in one section with no external filtering in between. This is aggressive since our existing chips have 2 IF sections with separate DC feedback for each section and external filtering in between. If the proposed 1 section solution fails, going back to our old technique will require more pins than we perhaps have!
The IQ Demodulator Section
The IQ Demodulator section takes the signal after external filtering fronl the chip's IF anlp output. The I/Q LO is supplied to the chip
1995 Feb 16
4
Philips Semiconductors
Preliminary specification
IS-54 IF receiver
SA638
IF BPF
OPTIONAL BPF
Vcc
C48 MIXOUT
C42
C49
C43 Vmid
C52
C51 DEMOD2/ OFFSETS GND2 IQ REF VOLTAGE Vcc2 I
IF AMP DC IF AMP IN
IF AMP OUT GND1 IQ DEMOD
24
23
22
21
20
19
18
17
16
15
14
13
R35 r=R1
Vcc/2 BIAS GEN +OUT -OUT I-MIXER GmC LPF
+IN IF AMP LIMITER/ AGC OUT -IN Gm-C LPF
R38 r=R1 LOW FREQUENCY FEEDBACK TO NULL DC OFFSETS FROM IF AMP
Q-MIXER
AGC DETECTOR
PWRDWN MODE CONTROL LO OSC & BUFFER
MIXER
DIVIDE /4 90 PHASE 3 4 5 6 7 8 9 10
FM DEMOD
1
2
11
12
RF
_RF
OSCB
OSCE
Vcc1
RSSI/AGC IN PWRDWN
DEMOD OSC x4
MODE SWITCH
AUDIO/ LPF
DEMOD1
Q
Vcc
SR00909
Figure 3. SA638 IS-54 Dual-Mode IF Chip
1995 Feb 16
5

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